/************************************************************* * jl16-2b.c - Demonstrate simple I/O functions of MC68HC908JL16 * * This program will cause a 7-segment display to either count up in * hexadecimal (0,1,2,...,E,F,0,1,...) or count down in decimal * (9,8,...,1,0,9,8,..) depending on whether or not a switch is pressed. * * Port A, bit 1 - input from switch (0 = pressed, 1 = not pressed) * When the switch is not pressed, the 7-segment display counts * up in hexadecimal. When the switch is pressed, the 7-segment * display counts down in decimal. * Port B, bits 0-6 - Outputs to data inputs of 74LS374 register. * Bit 6 -> segment A, 5->B, ... , 1->F, 0->G * A low output bit will cause the LED segment to light up. * Port A, bit 5 - Output to positive edge-triggered clock input * of 74LS374 register. * * This examples show how to use the zero-page of RAM for storing variables * * Revision History * Date Author Description * 01/03/05 M. Redekopp Initial Release * 09/05/05 A. Weber Modified for JL8 processor * 01/13/06 A. Weber Modified for CodeWarrior 5.0 * 08/25/06 A. Weber Modified for JL16 processor * 04/23/07 A. Weber Split example 2 into 2a and 2b * 06/25/07 A. Weber Updated name of direct page segment * 08/17/07 A. Weber Incorporated changes to demo board * 04/22/08 A. Weber Added "one" variable to make warning go away * 04/23/08 A. Weber Adjusted wait_100ms for 9.8304MHz clock * 07/09/12 A. Weber Removed code to set security bytes * 05/29/13 A. Weber Renamed CWJL-2b.c to jl16-2b.c *************************************************************/ #include /* for EnableInterrupts macro */ #include "derivative.h" /* include peripheral declarations */ /* Some of the RAM on the JL16 is in the range 0x60 to 0xff and can be accessed using the direct addressing mode which is the most efficient way to get at RAM in the "zero page" of 0x00 to 0xff. The rest of RAM is from 0x100 to 0x25f and must be accessed using extended addressing. For C it doesn't make much difference since the compiler will generate the correct instructions. However to make the best use of assembly code you need to know where the variables have been stored so you know whether or not direct addressing can be used. The follwing pragma puts the variables in the zero page and the wait_100ms routine uses direct addressing. */ #pragma DATA_SEG __SHORT_SEG MY_ZEROPAGE unsigned char digit_segs[16] = { 0x7e,0x30,0x6d,0x79,0x33,0x5b,0x5f,0x70, 0x7f,0x73,0x77,0x1f,0x4e,0x3d,0x4f,0x47 }; unsigned char delay0; unsigned char delay1; /* This pragma sets the area for allocating variables back to default area of RAM as defined in the PRM file. */ #pragma DATA_SEG DEFAULT void display_digit(int digit); // prototype void wait_100ms(void); // prototype void main(void) { unsigned char one = 1; unsigned char up; signed char cnt = 0; unsigned char i = 0; // EnableInterrupts; /* enable interrupts */ /* include your code here */ CONFIG1_COPD = 1; // disable COP reset PTAPUE_PTAPUE1 = 1; // Enable pull-up for switch on PTA1 DDRA = 0x20; // Set PTA bit 5 for output DDRB = 0x7f; // Set PTB bits 0-6 for output while(one) { // Loop forever display_digit(cnt); for (i = 0; i < 5; i++) // wait 500 ms wait_100ms(); up = PTA_PTA1; if (up) { // if button is not pressed, up = 1 if (++cnt > 15) // and we count up in hex cnt = 0; } else { // if button is pressed, up = 0 if (--cnt < 0 || cnt > 9) // and we count down in decimal cnt = 9; } } /* please make sure that you never leave this function */ } void display_digit(int digit) { PTB = digit_segs[digit] ^ 0xff; // invert the bits (active low outputs) PTA_PTA5 = 1; // toggle the clock bit to 1 PTA_PTA5 = 0; // toggle the clock bit to 0 } /* Note: this delay routine only works if the the delay0 and delay1 variables are located in the RAM zero page (direct addressing used). */ /* wait_100ms - Delay about 100msec. */ void wait_100ms(void) { asm { ; The following code delays 100 milliseconds by looping. ; Total time is 4 + 136 * (3 + 256 * (4 + 3) + 4 + 3)= 245,076 cycles ; A 9.8304MHz external clock gives an internal CPU clock of ; 2.4576MHz (407ns/cycle). Delay is then 99.7 milliseconds. mov #136,delay1 ; 4 clocks m1: clr delay0 ; 3 clocks m0: dec delay0 ; 4 clocks bne m0 ; 3 clocks dec delay1 ; 4 clocks bne m1 ; 3 clocks } }